/*
  This is part of the rtl8180-sa2400 driver
  released under the GPL (See file COPYING for details).
  Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
  
  This files contains programming code for the rtl8225 
  radio frontend.
  
  *Many* thanks to Realtek Corp. for their great support!
  
*/

#include "r8180_hw.h"
#include "r8180_rtl8225.h"
#include "r8180_93cx6.h"

//#ifdef ENABLE_DOT11D
//#include "dot11d.h"
//#endif

#ifdef CONFIG_RTL8185B

//2005.11.16
//u8 rtl8225z2_threshold[] = {
//	0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
//};
u32 rtl8225_chan[] = {
	0,
	0x0080,			//ch1
	0x0100,			//ch2
	0x0180,			//ch3
	0x0200,			//ch4
	0x0280,
	0x0300,
	0x0380,
	0x0400,
	0x0480,
	0x0500,
	0x0580,
	0x0600,
	0x0680,
	0x074A,			//ch14
};

u8 rtl8225z2_gain_bg[] = {
	0x23, 0x15, 0xa5,	// -82-1dbm
	0x23, 0x15, 0xb5,	// -82-2dbm
	0x23, 0x15, 0xc5,	// -82-3dbm
	0x33, 0x15, 0xc5,	// -78dbm
	0x43, 0x15, 0xc5,	// -74dbm
	0x53, 0x15, 0xc5,	// -70dbm
	0x63, 0x15, 0xc5,	// -66dbm
};

u8 rtl8225z2_gain_a[] = {
	0x13, 0x27, 0x5a,	//,0x37,// -82dbm 
	0x23, 0x23, 0x58,	//,0x37,// -82dbm 
	0x33, 0x1f, 0x56,	//,0x37,// -82dbm 
	0x43, 0x1b, 0x54,	//,0x37,// -78dbm 
	0x53, 0x17, 0x51,	//,0x37,// -74dbm 
	0x63, 0x24, 0x4f,	//,0x37,// -70dbm 
	0x73, 0x0f, 0x4c,	//,0x37,// -66dbm 
};

u8 ZEBRA2_CCK_OFDM_GAIN_SETTING[] = {
	0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
	0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
	0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
	0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
	0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
};


void rtl8225z2_set_gain(struct net_device *dev, short gain)
{
	u8 *rtl8225_gain;
	struct r8180_priv *priv = ieee80211_priv(dev);
	//return; 
	u8 mode = priv->ieee80211->mode;

	if (mode == IEEE_B || mode == IEEE_G)
		rtl8225_gain = rtl8225z2_gain_bg;
	else
		rtl8225_gain = rtl8225z2_gain_a;

	write_phy_ofdm(dev, 0x0b, rtl8225_gain[gain * 3]);
	write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 3 + 1]);
	write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 3 + 2]);
}

u32 read_rtl8225(struct net_device *dev, u8 adr)
{
	u32 data2Write = ((u32) (adr & 0x1f)) << 27;
	u32 dataRead;
	u32 mask;
	u16 oval, oval2, oval3, tmp;
	int i;
	short bit, rw;

	u8 wLength = 6;
	u8 rLength = 12;
	u8 low2high = 0;

	oval = read_nic_word(dev, RFPinsOutput);
	oval2 = read_nic_word(dev, RFPinsEnable);
	oval3 = read_nic_word(dev, RFPinsSelect);

	write_nic_word(dev, RFPinsEnable, (oval2 | 0xf));
	write_nic_word(dev, RFPinsSelect, (oval3 | 0xf));

	dataRead = 0;

	oval &= ~0xf;

	write_nic_word(dev, RFPinsOutput, oval | BB_HOST_BANG_EN);
	udelay(4);

	write_nic_word(dev, RFPinsOutput, oval);
	udelay(5);

	rw = 0;

	mask = (low2high) ? 0x01 : (((u32) 0x01) << (32 - 1));
	for (i = 0; i < wLength / 2; i++) {
		bit = ((data2Write & mask) != 0) ? 1 : 0;
		write_nic_word(dev, RFPinsOutput, bit | oval | rw);
		udelay(1);

		write_nic_word(dev, RFPinsOutput,
			       bit | oval | BB_HOST_BANG_CLK | rw);
		udelay(2);
		write_nic_word(dev, RFPinsOutput,
			       bit | oval | BB_HOST_BANG_CLK | rw);
		udelay(2);

		mask = (low2high) ? (mask << 1) : (mask >> 1);

		if (i == 2) {
			rw = BB_HOST_BANG_RW;
			write_nic_word(dev, RFPinsOutput,
				       bit | oval | BB_HOST_BANG_CLK | rw);
			udelay(2);
			write_nic_word(dev, RFPinsOutput, bit | oval | rw);
			udelay(2);
			break;
		}

		bit = ((data2Write & mask) != 0) ? 1 : 0;

		write_nic_word(dev, RFPinsOutput,
			       oval | bit | rw | BB_HOST_BANG_CLK);
		udelay(2);
		write_nic_word(dev, RFPinsOutput,
			       oval | bit | rw | BB_HOST_BANG_CLK);
		udelay(2);

		write_nic_word(dev, RFPinsOutput, oval | bit | rw);
		udelay(1);

		mask = (low2high) ? (mask << 1) : (mask >> 1);
	}

	//twreg.struc.clk = 0;
	//twreg.struc.data = 0;
	write_nic_word(dev, RFPinsOutput, rw | oval);
	udelay(2);
	mask = (low2high) ? 0x01 : (((u32) 0x01) << (12 - 1));

	// We must set data pin to HW controled, otherwise RF can't driver it and 
	// value RF register won't be able to read back properly. 2006.06.13, by rcnjko.
	write_nic_word(dev, RFPinsEnable, (oval2 & (~0x01)));

	for (i = 0; i < rLength; i++) {
		write_nic_word(dev, RFPinsOutput, rw | oval);
		udelay(1);

		write_nic_word(dev, RFPinsOutput, rw | oval | BB_HOST_BANG_CLK);
		udelay(2);
		write_nic_word(dev, RFPinsOutput, rw | oval | BB_HOST_BANG_CLK);
		udelay(2);
		write_nic_word(dev, RFPinsOutput, rw | oval | BB_HOST_BANG_CLK);
		udelay(2);
		tmp = read_nic_word(dev, RFPinsInput);

		dataRead |= (tmp & BB_HOST_BANG_CLK ? mask : 0);

		write_nic_word(dev, RFPinsOutput, (rw | oval));
		udelay(2);

		mask = (low2high) ? (mask << 1) : (mask >> 1);
	}

	write_nic_word(dev, RFPinsOutput,
		       BB_HOST_BANG_EN | BB_HOST_BANG_RW | oval);
	udelay(2);

	write_nic_word(dev, RFPinsEnable, oval2);
	write_nic_word(dev, RFPinsSelect, oval3);	// Set To SW Switch
	write_nic_word(dev, RFPinsOutput, 0x3a0);

	return dataRead;

}

short rtl8225_is_V_z2(struct net_device *dev)
{
	short vz2 = 1;

	if (read_rtl8225(dev, 8) != 0x588)
		vz2 = 0;

	else /* reg 9 pg 1 = 24 */ if (read_rtl8225(dev, 9) != 0x700)
		vz2 = 0;

	/* sw back to pg 0 */
	write_rtl8225(dev, 0, 0xb7);

	return vz2;

}

#if 0
short rtl8225_rf_set_sens(struct net_device *dev, short sens)
{
	if (sens < 0 || sens > 6)
		return -1;

	if (sens > 4)
		write_rtl8225(dev, 0x0c, 0x850);
	else
		write_rtl8225(dev, 0x0c, 0x50);

	sens = 6 - sens;
	rtl8225_set_gain(dev, sens);

	write_phy_cck(dev, 0x41, rtl8225_threshold[sens]);
	return 0;

}
#endif

void rtl8225z2_rf_close(struct net_device *dev)
{
	RF_WriteReg(dev, 0x4, 0x1f);
	force_pci_posting(dev);
	mdelay(1);
	rtl8180_set_anaparam(dev, RTL8225z2_ANAPARAM_OFF);
	rtl8185_set_anaparam2(dev, RTL8225z2_ANAPARAM2_OFF);
}


void rtl8225_host_pci_init(struct net_device *dev)
{
	write_nic_word(dev, RFPinsOutput, 0x480);
	rtl8185_rf_pins_enable(dev);
	//if(priv->card_8185 == 2 && priv->enable_gpio0 ) /* version D */
	//write_nic_word(dev, RFPinsSelect, 0x88);
	//else
	write_nic_word(dev, RFPinsSelect, 0x88 | SW_CONTROL_GPIO);	/* 0x488 | SW_CONTROL_GPIO */
	write_nic_byte(dev, GP_ENABLE, 0);
	force_pci_posting(dev);
	mdelay(200);
	write_nic_word(dev, GP_ENABLE, 0xff & (~(1 << 6)));	/* bit 6 is for RF on/off detection */
}

void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
{
	int i;
	u16 out, select;
	u8 bit;
	u32 bangdata = (data << 4) | (adr & 0xf);
	struct r8180_priv *priv = ieee80211_priv(dev);

	out = read_nic_word(dev, RFPinsOutput) & 0xfff3;

	write_nic_word(dev, RFPinsEnable,
		       (read_nic_word(dev, RFPinsEnable) | 0x7));

	select = read_nic_word(dev, RFPinsSelect);

	write_nic_word(dev, RFPinsSelect, select | 0x7 |
		       ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));

	force_pci_posting(dev);
	udelay(10);

	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);	//| 0x1fff);

	force_pci_posting(dev);
	udelay(2);

	write_nic_word(dev, RFPinsOutput, out);

	force_pci_posting(dev);
	udelay(10);

	for (i = 15; i >= 0; i--) {
		bit = (bangdata & (1 << i)) >> i;
		write_nic_word(dev, RFPinsOutput, bit | out);
		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
		i--;
		bit = (bangdata & (1 << i)) >> i;
		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
		write_nic_word(dev, RFPinsOutput, bit | out);
	}

	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);

	force_pci_posting(dev);
	udelay(10);

	write_nic_word(dev, RFPinsOutput, out |
		       ((priv->card_type == USB) ? 4 : BB_HOST_BANG_EN));

	write_nic_word(dev, RFPinsSelect, select |
		       ((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));

	if (priv->card_type == USB)
		mdelay(2);
	else
		rtl8185_rf_pins_enable(dev);
}

//
//      Description:
//              Map dBm into Tx power index according to 
//              current HW model, for example, RF and PA, and
//              current wireless mode.
//
s8
DbmToTxPwrIdx(struct r8180_priv *priv,
	      WIRELESS_MODE WirelessMode, s32 PowerInDbm)
{
	bool bUseDefault = true;
	s8 TxPwrIdx = 0;

	// 071011, SD3 SY:
	// OFDM Power in dBm = Index * 0.5 + 0 
	// CCK Power in dBm = Index * 0.25 + 13
	//
	if (priv->card_8185 >= VERSION_8187S_B) {
		s32 tmp = 0;

		if (WirelessMode == WIRELESS_MODE_G) {
			bUseDefault = false;
			tmp = (2 * PowerInDbm);

			if (tmp < 0)
				TxPwrIdx = 0;
			else if (tmp > 35)	// 40 means 20 dBm.
				TxPwrIdx = 35;
			else
				TxPwrIdx = (s8) tmp;
		} else if (WirelessMode == WIRELESS_MODE_B) {
			bUseDefault = false;
			tmp = (4 * PowerInDbm) - 52;

			if (tmp < 0)
				TxPwrIdx = 0;
			else if (tmp > 28)	// 28 means 20 dBm.
				TxPwrIdx = 28;
			else
				TxPwrIdx = (s8) tmp;
		}
	}

	//      
	// TRUE if we want to use a default implementation.
	// We shall set it to FALSE when we have exact translation formular 
	// for target IC. 070622, by rcnjko.
	//
	if (bUseDefault) {
		if (PowerInDbm < 0)
			TxPwrIdx = 0;
		else if (PowerInDbm > 35)
			TxPwrIdx = 35;
		else
			TxPwrIdx = (u8) PowerInDbm;
	}

	return TxPwrIdx;
}

s32
PwrIdxToDbm(struct r8180_priv *priv,
	      WIRELESS_MODE WirelessMode, s8 TxPowerIdx)
{
	bool bUseDefault = true;
	s32 TxPwrDbm = 0;

	// 071011, SD3 SY:
	// OFDM Power in dBm = Index * 0.5 + 0 
	// CCK Power in dBm = Index * 0.25 + 13
	//
	s32 tmp = 0;

	if (WirelessMode == WIRELESS_MODE_G) {
		TxPwrDbm=TxPowerIdx/2 + 3;
	} else if (WirelessMode == WIRELESS_MODE_B) {
		TxPwrDbm=TxPowerIdx/4 + 13;
	} else TxPwrDbm=0;
	
	return TxPwrDbm;
}


void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
{
	struct r8180_priv *priv = ieee80211_priv(dev);
	u8 max_cck_power_level;
	u8 max_ofdm_power_level;
	u8 min_ofdm_power_level;

	char cck_power_level = (char)(0xff & priv->chtxpwr[ch]);	//+by amy 080312
	char ofdm_power_level = (char)(0xff & priv->chtxpwr_ofdm[ch]);	//+by amy 080312


	max_cck_power_level = 15;
	max_ofdm_power_level = 25;	//  12 -> 25
	min_ofdm_power_level = 10;

	if (cck_power_level > 35)
		cck_power_level = 35;
	if (ofdm_power_level > 35)
		ofdm_power_level = 35;

	write_nic_byte(dev, CCK_TXAGC,
		       (ZEBRA2_CCK_OFDM_GAIN_SETTING[(u8) cck_power_level]));
	//printk("CCK TX power is %x\n", (ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level]));
	force_pci_posting(dev);
	mdelay(1);

//      rtl8185_set_anaparam2(dev,RTL8225_ANAPARAM2_ON);
	//rtl8185_set_anaparam2(dev, ANAPARM2_ASIC_ON);

	if (priv->up == 0) {
		//must add these for rtl8185B down, xiong-2006-11-21    
		write_phy_ofdm(dev, 2, 0x42);
		write_phy_ofdm(dev, 5, 0);
		write_phy_ofdm(dev, 6, 0x40);
		write_phy_ofdm(dev, 7, 0);
		write_phy_ofdm(dev, 8, 0x40);
	}
//ofdm_power_level=1;
	write_nic_byte(dev, OFDM_TXAGC,
		       ZEBRA2_CCK_OFDM_GAIN_SETTING[(u8) ofdm_power_level]);
	if (ofdm_power_level <= 11) {
		write_phy_ofdm(dev, 0x07, 0x5c);
		write_phy_ofdm(dev, 0x09, 0x5c);
	}
	if (ofdm_power_level <= 17) {
		write_phy_ofdm(dev, 0x07, 0x54);
		write_phy_ofdm(dev, 0x09, 0x54);
	} else {
		write_phy_ofdm(dev, 0x07, 0x50);
		write_phy_ofdm(dev, 0x09, 0x50);
	}
	force_pci_posting(dev);
	mdelay(1);

}

#if 0
/* switch between mode B and G */
void rtl8225_set_mode(struct net_device *dev, short modeb)
{
	write_phy_ofdm(dev, 0x15, (modeb ? 0x0 : 0x40));
	write_phy_ofdm(dev, 0x17, (modeb ? 0x0 : 0x40));
}
#endif

void rtl8225z2_rf_set_chan(struct net_device *dev, short ch)
{
	int errcnt=0;
/*
	short gset = (priv->ieee80211->state == IEEE80211_LINKED &&
		ieee80211_is_54g(priv->ieee80211->current_network)) ||
		priv->ieee80211->iw_mode == IW_MODE_MONITOR;
*/
	rtl8225z2_SetTXPowerLevel(dev, ch);

	RF_WriteReg(dev, 0x7, rtl8225_chan[ch]);

	//YJ,add,080828, if set channel failed, write again
	if ((RF_ReadReg(dev, 0x7) & 0x0F80) != rtl8225_chan[ch])
		RF_WriteReg(dev, 0x7, rtl8225_chan[ch]);

	mdelay(1);

	force_pci_posting(dev);
	mdelay(10);
}


//lzm mod 080826

#define MAX_DOZE_WAITING_TIMES_85B 		20
#define MAX_POLLING_24F_TIMES_87SE 			10
#define LPS_MAX_SLEEP_WAITING_TIMES_87SE 	5

bool
SetZebraRFPowerState8185(struct net_device *dev,
			 RT_RF_POWER_STATE eRFPowerState)
{
	struct r8180_priv *priv = ieee80211_priv(dev);
	u8 btCR9346, btConfig3;
	bool bActionAllowed = true, bTurnOffBB = true;	//lzm mod 080826
	//u32                   DWordContent;
	u8 u1bTmp;
	int i;
	//u16                   u2bTFPC = 0;
	bool bResult = true;
	u8 QueueID;

	if (priv->SetRFPowerStateInProgress == true)
		return false;

	priv->SetRFPowerStateInProgress = true;

	// enable EEM0 and EEM1 in 9346CR
	btCR9346 = read_nic_byte(dev, CR9346);
	write_nic_byte(dev, CR9346, (btCR9346 | 0xC0));
	// enable PARM_En in Config3
	btConfig3 = read_nic_byte(dev, CONFIG3);
	write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En));


	switch (eRFPowerState) {
		case eRfOn:
			//printk("===================================power on@jiffies:%d\n",jiffies);
			write_nic_word(dev, 0x37C, 0x00EC);

			//turn on AFE
			write_nic_byte(dev, 0x54, 0x00);
			write_nic_byte(dev, 0x62, 0x00);

			//lzm mod 080826
			//turn on RF                    
			//RF_WriteReg(dev, 0x0, 0x009f); //mdelay(1);
			//RF_WriteReg(dev, 0x4, 0x0972); //mdelay(1);
			RF_WriteReg(dev, 0x0, 0x009f);
			udelay(500);
			RF_WriteReg(dev, 0x4, 0x0972);
			udelay(500);
			//turn on RF again, suggested by SD3 stevenl. 
			RF_WriteReg(dev, 0x0, 0x009f);
			udelay(500);
			RF_WriteReg(dev, 0x4, 0x0972);
			udelay(500);

			//turn on BB
//                      write_nic_dword(dev, PhyAddr, 0x4090); //ofdm 10=00
//                      write_nic_dword(dev, PhyAddr, 0x4092); //ofdm 12=00
			write_phy_ofdm(dev, 0x10, 0x40);
			write_phy_ofdm(dev, 0x12, 0x40);
			//Avoid power down at init time.
			write_nic_byte(dev, CONFIG4, priv->RFProgType);

			u1bTmp = read_nic_byte(dev, 0x24E);
			write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6))));

			break;

		case eRfSleep:
			// Make sure BusyQueue is empty befor turn off RFE pwoer.
			//printk("===================================power sleep@jiffies:%d\n",jiffies);

			for (QueueID = 0, i = 0; QueueID < 6;) {
				if (get_curr_tx_free_desc(dev, QueueID) ==
				    priv->txringcount) {
					QueueID++;
					continue;
				}
#if 0				//reserved amy
				else if (priv->NdisAdapter.CurrentPowerState !=
					 NdisDeviceStateD0) {
					RT_TRACE(COMP_POWER, DBG_LOUD,
						 ("eRfSleep: %d times TcbBusyQueue[%d] !=0 but lower power state!\n",
						  (pMgntInfo->TxPollingTimes +
						   1), QueueID));
					break;
				}
#endif
				else	//lzm mod 080826
				{
					priv->TxPollingTimes++;
					if (priv->TxPollingTimes >=
					    LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
						//RT_TRACE(COMP_POWER, DBG_WARNING, ("\n\n\n SetZebraRFPowerState8185B():eRfSleep:  %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", LPS_MAX_SLEEP_WAITING_TIMES_87SE, QueueID));
						bActionAllowed = false;
						break;
					} else {
						udelay(10);	// Windows may delay 3~16ms actually.
						//RT_TRACE(COMP_POWER, DBG_LOUD, ("eRfSleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (pMgntInfo->TxPollingTimes), QueueID));
					}
				}

				//lzm del 080826
				//if(i >= MAX_DOZE_WAITING_TIMES_85B)
				//{
				//printk("\n\n\n SetZebraRFPowerState8185B(): %d times BusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_85B, QueueID);
				//break;
				//}
			}

			if (bActionAllowed)	//lzm add 080826
			{
				//turn off BB RXIQ matrix to cut off rx signal
//                              write_nic_dword(dev, PhyAddr, 0x0090); //ofdm 10=00
//                              write_nic_dword(dev, PhyAddr, 0x0092); //ofdm 12=00
				write_phy_ofdm(dev, 0x10, 0x00);
				write_phy_ofdm(dev, 0x12, 0x00);
				//turn off RF
				RF_WriteReg(dev, 0x4, 0x0000);	//mdelay(1);
				RF_WriteReg(dev, 0x0, 0x0000);	//mdelay(1);
				//turn off AFE except PLL
				write_nic_byte(dev, 0x62, 0xff);
				write_nic_byte(dev, 0x54, 0xec);
//                              mdelay(10);

#if 1
				mdelay(1);
				{
					int i = 0;
					while (true) {
						u8 tmp24F =
						    read_nic_byte(dev, 0x24f);
						if ((tmp24F == 0x01)
						    || (tmp24F == 0x09)) {
							bTurnOffBB = true;
							break;
						} else	//lzm mod 080826
						{
							udelay(10);
							i++;
							priv->TxPollingTimes++;

							if (priv->TxPollingTimes
							    >=
							    LPS_MAX_SLEEP_WAITING_TIMES_87SE)
							{
								//RT_TRACE(COMP_POWER, DBG_WARNING, ("\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times Rx Mac0x24F=0x%x !!!\n\n\n", i, u1bTmp24F));
								bTurnOffBB =
								    false;
								break;
							} else {
								udelay(10);	// Windows may delay 3~16ms actually.
								//RT_TRACE(COMP_POWER, DBG_LOUD,("(%d)eRfSleep- u1bTmp24F= 0x%X\n", i, u1bTmp24F));

							}
						}

						//lzm del 080826
						//if (i > MAX_POLLING_24F_TIMES_87SE)
						//      break;
					}
				}
#endif
				if (bTurnOffBB)	//lzm mod 080826
				{
					//turn off BB
					u1bTmp = read_nic_byte(dev, 0x24E);
					write_nic_byte(dev, 0x24E,
						       (u1bTmp | BIT5 | BIT6));

					//turn off AFE PLL
					//write_nic_byte(dev, 0x54, 0xec);                      
					//write_nic_word(dev, 0x37C, 0x00ec);   
					write_nic_byte(dev, 0x54, 0xFC);	//[ECS] FC-> EC->FC, asked by SD3 Stevenl
					write_nic_word(dev, 0x37C, 0x00FC);	//[ECS] FC-> EC->FC, asked by SD3 Stevenl
				}
			}
			break;

		case eRfOff:
			// Make sure BusyQueue is empty befor turn off RFE pwoer.
			//printk("===================================power off@jiffies:%d\n",jiffies);
			for (QueueID = 0, i = 0; QueueID < 6;) {
				if (get_curr_tx_free_desc(dev, QueueID) ==
				    priv->txringcount) {
					QueueID++;
					continue;
				} else {
					udelay(10);
					i++;
				}

				if (i >= MAX_DOZE_WAITING_TIMES_85B) {
					//printk("\n\n\n SetZebraRFPowerState8185B(): %d times BusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_85B, QueueID);
					break;
				}
			}

			//turn off BB RXIQ matrix to cut off rx signal
//                      write_nic_dword(dev, PhyAddr, 0x0090); //ofdm 10=00
//                      write_nic_dword(dev, PhyAddr, 0x0092); //ofdm 12=00
			write_phy_ofdm(dev, 0x10, 0x00);
			write_phy_ofdm(dev, 0x12, 0x00);
			//turn off RF
			RF_WriteReg(dev, 0x4, 0x0000);	//mdelay(1);
			RF_WriteReg(dev, 0x0, 0x0000);	//mdelay(1);
			//turn off AFE except PLL
			write_nic_byte(dev, 0x62, 0xff);
			write_nic_byte(dev, 0x54, 0xec);
//                      mdelay(10);
#if 1
			mdelay(1);
			{
				int i = 0;
				while (true) {
					u8 tmp24F = read_nic_byte(dev, 0x24f);
					if ((tmp24F == 0x01)
					    || (tmp24F == 0x09)) {
						bTurnOffBB = true;
						break;
					} else {
						bTurnOffBB = false;
						udelay(10);
						i++;
					}
					if (i > MAX_POLLING_24F_TIMES_87SE)
						break;
				}
			}
#endif
			if (bTurnOffBB)	//lzm mod 080826
			{

				//turn off BB
				u1bTmp = read_nic_byte(dev, 0x24E);
				write_nic_byte(dev, 0x24E,
					       (u1bTmp | BIT5 | BIT6));
				//turn off AFE PLL (80M)
				//write_nic_byte(dev, 0x54, 0xec);                              
				//write_nic_word(dev, 0x37C, 0x00ec);    
				write_nic_byte(dev, 0x54, 0xFC);	//[ECS] FC-> EC->FC, asked by SD3 Stevenl
				write_nic_word(dev, 0x37C, 0x00FC);	//[ECS] FC-> EC->FC, asked by SD3 Stevenl
			}

			break;

		default:
			bResult = false;
			printk
			    ("SetZebraRFPowerState8185(): unknow state to set: 0x%X!!!\n",
			     eRFPowerState);
			break;
	}

	// disable PARM_En in Config3
	btConfig3 &= ~(CONFIG3_PARM_En);
	write_nic_byte(dev, CONFIG3, btConfig3);
	// disable EEM0 and EEM1 in 9346CR
	btCR9346 &= ~(0xC0);
	write_nic_byte(dev, CR9346, btCR9346);

	if (bResult && bActionAllowed)	//lzm mod 080826
	{
		// Update current RF state variable.
		priv->eRFPowerState = eRFPowerState;
#if 0
		switch (priv->eRFPowerState) {
		case eRfOff:
			//
			//If Rf off reason is from IPS, Led should blink with no link, by Maddest 071015
			//
			if (priv->RfOffReason == RF_CHANGE_BY_IPS) {
				Adapter->HalFunc.LedControlHandler(Adapter,
								   LED_CTL_NO_LINK);
			} else {
				// Turn off LED if RF is not ON.
				Adapter->HalFunc.LedControlHandler(Adapter,
								   LED_CTL_POWER_OFF);
			}
			break;

		case eRfOn:
			// Turn on RF we are still linked, which might happen when 
			// we quickly turn off and on HW RF. 2006.05.12, by rcnjko.
			if (pMgntInfo->bMediaConnect == TRUE) {
				Adapter->HalFunc.LedControlHandler(Adapter,
								   LED_CTL_LINK);
			}
			break;

		default:
			// do nothing.
			break;
		}
#endif

	}

	priv->SetRFPowerStateInProgress = false;

	return (bResult && bActionAllowed);
}

void rtl8225z4_rf_sleep(struct net_device *dev)
{
	//
	// Turn off RF power.
	//
	//printk("=========>%s()\n", __FUNCTION__);
	MgntActSet_RF_State(dev, eRfSleep, RF_CHANGE_BY_PS);
	//mdelay(2);    //FIXME 
}

void rtl8225z4_rf_wakeup(struct net_device *dev)
{
	//
	// Turn on RF power.
	//
	//printk("=========>%s()\n", __FUNCTION__);
	MgntActSet_RF_State(dev, eRfOn, RF_CHANGE_BY_PS);
}
#endif
